Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32h5/STM32H523/ICACHE/ICACHE_FCR#0x0
CBSYENDF=B_0x0, CERRF=B_0x0
ICACHE flag clear register
clear busy end flag
0 (B_0x0): no effect
1 (B_0x1): clears BSYENDF flag in ICACHE_SR.
clear cache error flag
1 (B_0x1): clears ERRF flag in ICACHE_SR
https://github.com/modm-io/cmsis-svd-stm32