stm32 /stm32n6 /STM32N647 /LTDC /LTDC_GCCR

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Interpret as LTDC_GCCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ADDR0COMP0 (B_0x0)BEN 0 (B_0x0)GEN 0 (B_0x0)REN

REN=B_0x0, BEN=B_0x0, GEN=B_0x0

Description

LTDC gamma correction configuration register

Fields

ADDR

address of the R,G,B table where the COMP component is written

COMP

color component to be written, in either (or all) the R,G,B tables

BEN

write trigger to the blue table

0 (B_0x0): no action done

1 (B_0x1): COMP is written at ADDR in the blue table.

GEN

write trigger to the green table

0 (B_0x0): no action done

1 (B_0x1): COMP is written at ADDR in the green table.

REN

write trigger to the red table

0 (B_0x0): no action done

1 (B_0x1): COMP is written at ADDR in the red table.

Links

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