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stm32 /stm32n6 /STM32N647 /LTDC /LTDC_ICR2

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Interpret as LTDC_ICR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CLIF 0 (B_0x0)CFUWIF 0 (B_0x0)CTERRIF 0 (B_0x0)CRRIF 0 (B_0x0)CFUIF 0 (B_0x0)CCRCIF

CCRCIF=B_0x0, CRRIF=B_0x0, CLIF=B_0x0, CFUIF=B_0x0, CTERRIF=B_0x0, CFUWIF=B_0x0

Description

LTDC interrupt clear register 2

Fields

CLIF

clears the Line interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the LIF flag in LTDC_ISR2.
CFUWIF

clears the FIFO underrun warning interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the FUWIF flag in LTDC_ISR2.
CTERRIF

clears the Transfer Error interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the TERRIF flag in LTDC_ISR2.
CRRIF

clears register reload interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the RRIF flag in LTDC_ISR2.
CFUIF

clears the FIFO underrun interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the FUIF flag in LTDC_ISR2.
CCRCIF

clears the CRC error interrupt flag

0 (B_0x0): no effect

1 (B_0x1): clears the CRCIF flag in LTDC_ISR2.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32