CRCIE=B_0x0, FUIE=B_0x0, RRIE=B_0x0, TERRIE=B_0x0, FUWIE=B_0x0, LIE=B_0x0
LTDC interrupt enable register 2
| LIE | Line interrupt enable 0 (B_0x0): line interrupt disabled 1 (B_0x1): line interrupt enabled |
| FUWIE | FIFO underrun warning interrupt enable 0 (B_0x0): FIFO underrun interrupt disabled 1 (B_0x1): FIFO underrun Interrupt enabled |
| TERRIE | Transfer error interrupt enable 0 (B_0x0): transfer error interrupt disabled 1 (B_0x1): transfer error interrupt enabled |
| RRIE | Register reload interrupt enable 0 (B_0x0): register reload interrupt disabled 1 (B_0x1): register reload interrupt enabled |
| FUIE | FIFO underrun interrupt enable 0 (B_0x0): FIFO underrun interrupt disabled 1 (B_0x1): FIFO underrun Interrupt enabled |
| CRCIE | CRC error interrupt enable 0 (B_0x0): CRC error disabled 1 (B_0x1): CRC error interrupt enabled |