Regviz

stm32 /stm32n6 /STM32N647 /LTDC /LTDC_L1BFCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LTDC_L1BFCR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/LTDC/LTDC_L1BFCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0BF20BF10 (B_0x0)BOR

BOR=B_0x0

Description

LTDC layerx blending factors configuration register

Fields

BF2

blending factor 2

5 (B_0x5): 1 - constant alpha

7 (B_0x7): 1 - (pixel alpha x constant alpha)
BF1

blending factor 1

4 (B_0x4): constant alpha

6 (B_0x6): pixel alpha x constant alpha
BOR

blending order

0 (B_0x0): layer set in background

1 (B_0x1): layer set in foreground

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32