Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32n6/STM32N645/RCC/RCC_AHB2LPENSR#0x0
RCC AHB2 Sleep enable register
RAMCFG sleep enable
MDF1 sleep enable
ADF1 sleep enable
https://github.com/modm-io/cmsis-svd-stm32