Regviz

stm32 /stm32n6 /STM32N647 /RCC /RCC_AHB4ENCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_AHB4ENCR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/RCC/RCC_AHB4ENCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOAENC)GPIOAENC 0 (GPIOBENC)GPIOBENC 0 (GPIOCENC)GPIOCENC 0 (GPIODENC)GPIODENC 0 (GPIOEENC)GPIOEENC 0 (GPIOFENC)GPIOFENC 0 (GPIOGENC)GPIOGENC 0 (GPIOHENC)GPIOHENC 0 (GPIONENC)GPIONENC 0 (GPIOOENC)GPIOOENC 0 (GPIOPENC)GPIOPENC 0 (GPIOQENC)GPIOQENC 0 (PWRENC)PWRENC 0 (CRCENC)CRCENC

Description

RCC AHB4 enable register

Fields

GPIOAENC

GPIOA enable
GPIOBENC

GPIOB enable
GPIOCENC

GPIOC enable
GPIODENC

GPIOD enable
GPIOEENC

GPIOE enable
GPIOFENC

GPIOF enable
GPIOGENC

GPIOG enable
GPIOHENC

GPIOH enable
GPIONENC

GPION enable
GPIOOENC

GPIOO enable
GPIOPENC

GPIOP enable
GPIOQENC

GPIOQ enable
PWRENC

PWR enable
CRCENC

CRC enable

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32