stm32 /stm32n6 /STM32N647 /RCC /RCC_APB1LLPENSR

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Interpret as RCC_APB1LLPENSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM2LPENS)TIM2LPENS 0 (TIM3LPENS)TIM3LPENS 0 (TIM4LPENS)TIM4LPENS 0 (TIM5LPENS)TIM5LPENS 0 (TIM6LPENS)TIM6LPENS 0 (TIM7LPENS)TIM7LPENS 0 (TIM12LPENS)TIM12LPENS 0 (TIM13LPENS)TIM13LPENS 0 (TIM14LPENS)TIM14LPENS 0 (LPTIM1LPENS)LPTIM1LPENS 0 (WWDGLPENS)WWDGLPENS 0 (TIM10LPENS)TIM10LPENS 0 (TIM11LPENS)TIM11LPENS 0 (SPI2LPENS)SPI2LPENS 0 (SPI3LPENS)SPI3LPENS 0 (SPDIFRX1LPENS)SPDIFRX1LPENS 0 (USART2LPENS)USART2LPENS 0 (USART3LPENS)USART3LPENS 0 (UART4LPENS)UART4LPENS 0 (UART5LPENS)UART5LPENS 0 (I2C1LPENS)I2C1LPENS 0 (I2C2LPENS)I2C2LPENS 0 (I2C3LPENS)I2C3LPENS 0 (I3C1LPENS)I3C1LPENS 0 (I3C2LPENS)I3C2LPENS 0 (UART7LPENS)UART7LPENS 0 (UART8LPENS)UART8LPENS

Description

RCC APB1L Sleep enable register

Fields

TIM2LPENS

TIM2 sleep enable

TIM3LPENS

TIM3 sleep enable

TIM4LPENS

TIM4 sleep enable

TIM5LPENS

TIM5 sleep enable

TIM6LPENS

TIM6 sleep enable

TIM7LPENS

TIM7 sleep enable

TIM12LPENS

TIM12 sleep enable

TIM13LPENS

TIM13 sleep enable

TIM14LPENS

TIM14 sleep enable

LPTIM1LPENS

LPTIM1 sleep enable

WWDGLPENS

WWDG sleep enable

TIM10LPENS

TIM10 sleep enable

TIM11LPENS

TIM11 sleep enable

SPI2LPENS

SPI2 sleep enable

SPI3LPENS

SPI3 sleep enable

SPDIFRX1LPENS

SPDIFRX1 sleep enable

USART2LPENS

USART2 sleep enable

USART3LPENS

USART3 sleep enable

UART4LPENS

UART4 sleep enable

UART5LPENS

UART5 sleep enable

I2C1LPENS

I2C1 sleep enable

I2C2LPENS

I2C2 sleep enable

I2C3LPENS

I2C3 sleep enable

I3C1LPENS

I3C1 sleep enable

I3C2LPENS

I3C2 sleep enable

UART7LPENS

UART7 sleep enable

UART8LPENS

UART8 sleep enable

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