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stm32 /stm32n6 /STM32N647 /RCC /RCC_BUSLPENR

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Interpret as RCC_BUSLPENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ACLKNLPEN 0 (B_0x0)ACLKNCLPEN 0 (B_0x0)AHBMLPEN 0 (B_0x0)AHB1LPEN 0 (B_0x0)AHB2LPEN 0 (B_0x0)AHB3LPEN 0 (B_0x0)AHB4LPEN 0 (B_0x0)AHB5LPEN 0 (B_0x0)APB1LPEN 0 (B_0x0)APB2LPEN 0 (B_0x0)APB3LPEN 0 (B_0x0)APB4LPEN 0 (B_0x0)APB5LPEN

APB2LPEN=B_0x0, AHB5LPEN=B_0x0, AHB4LPEN=B_0x0, APB5LPEN=B_0x0, APB1LPEN=B_0x0, AHB2LPEN=B_0x0, AHB1LPEN=B_0x0, ACLKNCLPEN=B_0x0, APB3LPEN=B_0x0, APB4LPEN=B_0x0, AHBMLPEN=B_0x0, ACLKNLPEN=B_0x0, AHB3LPEN=B_0x0

Description

RCC SoC buses Sleep enable register

Fields

ACLKNLPEN

ACLKN sleep enable

0 (B_0x0): ACLKN is disabled in Sleep mode

1 (B_0x1): ACLKN is enabled in Sleep mode (default after reset)
ACLKNCLPEN

ACLKNC sleep enable

0 (B_0x0): ACLKNC is disabled in Sleep mode

1 (B_0x1): ACLKNC is enabled in Sleep mode (default after reset)
AHBMLPEN

AHBM sleep enable

0 (B_0x0): AHBM is disabled in Sleep mode (default after reset)

1 (B_0x1): AHBM is enabled in Sleep mode
AHB1LPEN

AHB1 sleep enable

0 (B_0x0): AHB1 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHB1 is enabled in Sleep mode
AHB2LPEN

AHB2 sleep enable

0 (B_0x0): AHB2 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHB2 is enabled in Sleep mode
AHB3LPEN

AHB3 sleep enable

0 (B_0x0): AHB3 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHB3 is enabled in Sleep mode
AHB4LPEN

AHB4 sleep enable

0 (B_0x0): AHB4 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHB4 is enabled in Sleep mode
AHB5LPEN

AHB5 sleep enable

0 (B_0x0): AHB5 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHB5 is enabled in Sleep mode
APB1LPEN

APB1 sleep enable

0 (B_0x0): APB1 is disabled in Sleep mode (default after reset)

1 (B_0x1): APB1 is enabled in Sleep mode
APB2LPEN

APB2 sleep enable

0 (B_0x0): APB2 is disabled in Sleep mode (default after reset)

1 (B_0x1): APB2 is enabled in Sleep mode
APB3LPEN

APB3 sleep enable

0 (B_0x0): APB3 is disabled in Sleep mode (default after reset)

1 (B_0x1): APB3 is enabled in Sleep mode
APB4LPEN

APB4 sleep enable

0 (B_0x0): APB4 is disabled in Sleep mode (default after reset)

1 (B_0x1): APB4 is enabled in Sleep mode
APB5LPEN

APB5 sleep enable

0 (B_0x0): APB5 is disabled in Sleep mode (default after reset)

1 (B_0x1): APB5 is enabled in Sleep mode

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32