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stm32 /stm32n6 /STM32N647 /RCC /RCC_DIVENCR

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Interpret as RCC_DIVENCR

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https://regviz.com/r/stm32/stm32n6/STM32N645/RCC/RCC_DIVENCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IC1ENC)IC1ENC 0 (IC2ENC)IC2ENC 0 (IC3ENC)IC3ENC 0 (IC4ENC)IC4ENC 0 (IC5ENC)IC5ENC 0 (IC6ENC)IC6ENC 0 (IC7ENC)IC7ENC 0 (IC8ENC)IC8ENC 0 (IC9ENC)IC9ENC 0 (IC10ENC)IC10ENC 0 (IC11ENC)IC11ENC 0 (IC12ENC)IC12ENC 0 (IC13ENC)IC13ENC 0 (IC14ENC)IC14ENC 0 (IC15ENC)IC15ENC 0 (IC16ENC)IC16ENC 0 (IC17ENC)IC17ENC 0 (IC18ENC)IC18ENC 0 (IC19ENC)IC19ENC 0 (IC20ENC)IC20ENC

Description

RCC divider enable register

Fields

IC1ENC

IC1 enable
IC2ENC

IC2 enable
IC3ENC

IC3 enable
IC4ENC

IC4 enable
IC5ENC

IC5 enable
IC6ENC

IC6 enable
IC7ENC

IC7 enable
IC8ENC

IC8 enable
IC9ENC

IC9 enable
IC10ENC

IC10 enable
IC11ENC

IC11 enable
IC12ENC

IC12 enable
IC13ENC

IC13 enable
IC14ENC

IC14 enable
IC15ENC

IC15 enable
IC16ENC

IC16 enable
IC17ENC

IC17 enable
IC18ENC

IC18 enable
IC19ENC

IC19 enable
IC20ENC

IC20 enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32