stm32 /stm32n6 /STM32N647 /RCC /RCC_SECCFGR1

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Interpret as RCC_SECCFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)PLL1SEC 0 (B_0x0)PLL2SEC 0 (B_0x0)PLL3SEC 0 (B_0x0)PLL4SEC

PLL4SEC=B_0x0, PLL1SEC=B_0x0, PLL2SEC=B_0x0, PLL3SEC=B_0x0

Description

RCC PLL secure configuration register1

Fields

PLL1SEC

Defines the secure protection of the PLL1 PLL configuration bits.

0 (B_0x0): PLL1 configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): PLL1 configuration bits are accessible by secure software only

PLL2SEC

Defines the secure protection of the PLL2 PLL configuration bits.

0 (B_0x0): PLL2 configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): PLL2 configuration bits are accessible by secure software only

PLL3SEC

Defines the secure protection of the PLL3 PLL configuration bits.

0 (B_0x0): PLL3 configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): PLL3 configuration bits are accessible by secure software only

PLL4SEC

Defines the secure protection of the PLL4 PLL configuration bits.

0 (B_0x0): PLL4 configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): PLL4 configuration bits are accessible by secure software only

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