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stm32 /stm32n6 /STM32N647 /RIFSC /RIFSC_RISC_CR

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Interpret as RIFSC_RISC_CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GLOCK

GLOCK=B_0x0

Description

RIFSC RISC slave configuration register x

Fields

GLOCK

Global lock

0 (B_0x0): RIFSC RISC registers are writable.

1 (B_0x1): All writes to RIFSC RISC registers are ignored.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32