stm32 /stm32n6 /STM32N647 /TAMP /TAMP_FLTCR

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Interpret as TAMP_FLTCR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TAMPFREQ 0 (B_0x0)TAMPFLT 0 (B_0x0)TAMPPRCH 0 (B_0x0)TAMPPUDIS

TAMPPUDIS=B_0x0, TAMPFLT=B_0x0, TAMPFREQ=B_0x0, TAMPPRCH=B_0x0

Description

TAMP filter control register

Fields

TAMPFREQ

Tamper sampling frequency

0 (B_0x0): RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)

1 (B_0x1): RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)

2 (B_0x2): RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)

3 (B_0x3): RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)

4 (B_0x4): RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)

5 (B_0x5): RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)

6 (B_0x6): RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)

7 (B_0x7): RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)

TAMPFLT

TAMP_INx filter count

0 (B_0x0): Tamper event is activated on edge of TAMP_INx input transitions to the active level (no internal pull-up on TAMP_INx input).

1 (B_0x1): Tamper event is activated after 2 consecutive samples at the active level.

2 (B_0x2): Tamper event is activated after 4 consecutive samples at the active level.

3 (B_0x3): Tamper event is activated after 8 consecutive samples at the active level.

TAMPPRCH

TAMP_INx precharge duration

0 (B_0x0): 1 RTCCLK cycle

1 (B_0x1): 2 RTCCLK cycles

2 (B_0x2): 4 RTCCLK cycles

3 (B_0x3): 8 RTCCLK cycles

TAMPPUDIS

TAMP_INx pull-up disable

0 (B_0x0): Precharge TAMP_INx pins before sampling (enable internal pull-up)

1 (B_0x1): Disable precharge of TAMP_INx pins.

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