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stm32 /stm32n6 /STM32N647 /TIM17 /TIM17_TISEL

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Interpret as TIM17_TISEL

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TI1SEL

TI1SEL=B_0x0

Description

TIM17 input selection register

Fields

TI1SEL

selects tim_ti1_in[15:0] input

0 (B_0x0): TIMx_CH1 input (tim_ti1_in0)

1 (B_0x1): tim_ti1_in1

15 (B_0xF): tim_ti1_in15

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32