stm32 /stm32n6 /STM32N647 /TIM3 /TIM3_SR

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Interpret as TIM3_SR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)UIF 0 (B_0x0)CC1IF 0 (CC2IF)CC2IF 0 (CC3IF)CC3IF 0 (CC4IF)CC4IF 0 (B_0x0)TIF 0 (B_0x0)CC1OF 0 (CC2OF)CC2OF 0 (CC3OF)CC3OF 0 (CC4OF)CC4OF 0 (B_0x0)IDXF 0 (B_0x0)DIRF 0 (B_0x0)IERRF 0 (B_0x0)TERRF

IERRF=B_0x0, TIF=B_0x0, UIF=B_0x0, CC1IF=B_0x0, DIRF=B_0x0, CC1OF=B_0x0, TERRF=B_0x0, IDXF=B_0x0

Description

TIM3 status register

Fields

UIF

Update interrupt flag

0 (B_0x0): No update occurred

1 (B_0x1): Update interrupt pending. This bit is set by hardware when the registers are updated:

CC1IF

Capture/compare 1 interrupt flag

0 (B_0x0): No compare match / No input capture occurred

1 (B_0x1): A compare match or an input capture occurred

CC2IF

Capture/Compare 2 interrupt flag

CC3IF

Capture/Compare 3 interrupt flag

CC4IF

Capture/Compare 4 interrupt flag

TIF

Trigger interrupt flag

0 (B_0x0): No trigger event occurred.

1 (B_0x1): Trigger interrupt pending.

CC1OF

Capture/Compare 1 overcapture flag

0 (B_0x0): No overcapture has been detected.

1 (B_0x1): The counter value has been captured in TIMx_CCR1 register while CC1IF flag was already set

CC2OF

Capture/compare 2 overcapture flag

CC3OF

Capture/Compare 3 overcapture flag

CC4OF

Capture/Compare 4 overcapture flag

IDXF

Index interrupt flag

0 (B_0x0): No index event occurred.

1 (B_0x1): An index event has occurred

DIRF

Direction change interrupt flag

0 (B_0x0): No direction change

1 (B_0x1): Direction change

IERRF

Index error interrupt flag

0 (B_0x0): No index error has been detected.

1 (B_0x1): An index error has been detected

TERRF

Transition error interrupt flag

0 (B_0x0): No encoder transition error has been detected.

1 (B_0x1): An encoder transition error has been detected

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