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stm32 /stm32n6 /STM32N647 /XSPI1 /XSPI_WTCR

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Interpret as XSPI_WTCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0DCYC

Description

XSPI write timing configuration register

Fields

DCYC

Number of dummy cycles

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32