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stm32 /stm32n6 /STM32N655 /DCMIPP /DCMIPP_P0FCR

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Interpret as DCMIPP_P0FCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CLINEF)CLINEF 0 (CFRAMEF)CFRAMEF 0 (CVSYNCF)CVSYNCF 0 (CLIMITF)CLIMITF 0 (COVRF)COVRF

Description

DCMIPP Pipe0 interrupt clear register

Fields

CLINEF

Multi-line capture complete interrupt status clear
CFRAMEF

Frame capture complete interrupt status clear
CVSYNCF

Vertical synchronization interrupt status clear
CLIMITF

limit interrupt status clear
COVRF

Overrun interrupt status clear

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32