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stm32 /stm32n6 /STM32N655 /DCMIPP /DCMIPP_P1PPM0PR

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Interpret as DCMIPP_P1PPM0PR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PITCH

Description

DCMIPP Pipex pixel packer Memory0 pitch register

Fields

PITCH

Number of bytes between the address of two consecutive lines.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32