FRAMEIE=B_0x0, LINEIE=B_0x0, OVRIE=B_0x0, VSYNCIE=B_0x0
DCMIPP Pipe2 interrupt enable register
| LINEIE | Multi-line capture completed interrupt enable 0 (B_0x0): No interrupt generation when the line is received 1 (B_0x1): An interrupt is generated after the full capture of a group of lines (or last line reached) |
| FRAMEIE | Frame capture completed interrupt enable 0 (B_0x0): No interrupt generation 1 (B_0x1): An interrupt is generated after the full capture of a cropped frame |
| VSYNCIE | VSYNC interrupt enable 0 (B_0x0): No interrupt generation 1 (B_0x1): An interrupt is generated on each VSYNC (captured or not) |
| OVRIE | Overrun interrupt enable 0 (B_0x0): No interrupt generation 1 (B_0x1): An interrupt is generated if the AXI master is unable to transfer the last data before new data (32-bit) are received |