LSU=B_0x0, FSU=B_0x0, LEU=B_0x0, FEU=B_0x0
DCMIPP parallel interface embedded synchronization unmask register
| FSU | Frame start delimiter unmask 0 (B_0x0): The corresponding bit in the FSC byte in DCMIPP_ESCR is masked while comparing the frame start delimiter with the received data 1 (B_0x1): The corresponding bit in the FSC byte in DCMIPP_ESCR is compared while comparing the frame start delimiter with the received data |
| LSU | Line start delimiter unmask 0 (B_0x0): The corresponding bit in the LSC byte in DCMIPP_ESCR is masked while comparing the line start delimiter with the received data 1 (B_0x1): The corresponding bit in the LSC byte in DCMIPP_ESCR is compared while comparing the line start delimiter with the received data |
| LEU | Line end delimiter unmask 0 (B_0x0): The corresponding bit in the LEC byte in DCMIPP_ESCR is masked while comparing the line end delimiter with the received data 1 (B_0x1): The corresponding bit in the LEC byte in DCMIPP_ESCR is compared while comparing the line end delimiter with the received data |
| FEU | Frame end delimiter unmask 0 (B_0x0): The corresponding bit in the FEC byte in DCMIPP_ESCR is masked while comparing the frame end delimiter with the received data. 1 (B_0x1): The corresponding bit in the FEC byte in DCMIPP_ESCR is compared while comparing the frame end delimiter with the received data |