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stm32 /stm32n6 /STM32N655 /DMA2D /DMA2D_AMTCR

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Interpret as DMA2D_AMTCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EN)EN 0DT

Description

DMA2D AXI master timer configuration register

Fields

EN

Dead-time functionality enable
DT

Dead time

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32