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stm32 /stm32n6 /STM32N655 /DTS /DTS_PVTTMR_CR

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Interpret as DTS_PVTTMR_CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TMR_DELAY0 (TMR_RUN)TMR_RUN

Description

DTS PVT timer control register

Fields

TMR_DELAY

Timer delay
TMR_RUN

Timer count enable bit

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32