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stm32 /stm32n6 /STM32N655 /ETH /ETH_MACPPSTTN0R

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Interpret as ETH_MACPPSTTN0R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TTSL00 (TRGTBUSY0)TRGTBUSY0

Description

PPS 0 target time nanoseconds register

Fields

TTSL0

Target Time Low for PPS Register
TRGTBUSY0

PPS Target Time Register Busy

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32