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stm32 /stm32n6 /STM32N655 /ETH /ETH_MACRXQC2R

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Interpret as ETH_MACRXQC2R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PSRQ00PSRQ1

Description

Rx queue control 2 register

Fields

PSRQ0

Priorities Selected in the Receive Queue 0
PSRQ1

Priorities Selected in the Receive Queue 1

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32