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stm32 /stm32n6 /STM32N655 /ETH /ETH_MTLTXQ1SSCR

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Interpret as ETH_MTLTXQ1SSCR

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https://regviz.com/r/stm32/stm32n6/STM32N645/ETH/ETH_MTLTXQ1SSCR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SSC

Description

Tx queue 1 send slope credit Register

Fields

SSC

sendSlopeCredit Value

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32