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stm32 /stm32n6 /STM32N655 /FMC1 /FMC_PMEM

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Interpret as FMC_PMEM

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)MEMSET0 (B_0x0)MEMWAIT0 (B_0x0)MEMHOLD0 (B_0x0)MEMHIZ

MEMWAIT=B_0x0, MEMSET=B_0x0, MEMHIZ=B_0x0, MEMHOLD=B_0x0

Description

FMC common memory space timing register

Fields

MEMSET

Common memory setup time

0 (B_0x0): 1 * fmc_ker_ck cycles

1 (B_0x1): 2 * fmc_ker_ck cycles

255 (B_0xFF): 256 * fmc_ker_ck cycles
MEMWAIT

Common memory wait time

0 (B_0x0): 1 * fmc_ker_ck cycles (+ wait cycle introduced by deasserting NWAIT)

1 (B_0x1): 2 * fmc_ker_ck cycles (+ wait cycle introduced by deasserting NWAIT)

255 (B_0xFF): 256 * fmc_ker_ck cycles (+ wait cycle introduced by deasserting NWAIT)
MEMHOLD

Common memory hold time

0 (B_0x0): 1 * fmc_ker_ck cycle

1 (B_0x1): 2 * fmc_ker_ck cycles

255 (B_0xFF): 256 * fmc_ker_ck cycles
MEMHIZ

Common memory data bus Hi-Z time

0 (B_0x0): 1 * fmc_ker_ck cycle

1 (B_0x1): 2 * fmc_ker_ck cycles

255 (B_0xFF): 256 * fmc_ker_ck cycles

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32