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stm32 /stm32n6 /STM32N655 /GFXTIM /GFXTIM_TDR

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Interpret as GFXTIM_TDR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)AFCDIS 0 (B_0x0)ALCDIS 0 (B_0x0)RFC1DIS 0 (B_0x0)RFC2DIS

ALCDIS=B_0x0, AFCDIS=B_0x0, RFC2DIS=B_0x0, RFC1DIS=B_0x0

Description

GFXTIM timers disable register

Fields

AFCDIS

absolute frame counter disable

0 (B_0x0): no effect

1 (B_0x1): absolute frame counter disabled
ALCDIS

absolute line counter disable

0 (B_0x0): no effect

1 (B_0x1): absolute line counter disabled
RFC1DIS

relative frame counter 1 disable

0 (B_0x0): no effect

1 (B_0x1): relative frame counter 1 disabled
RFC2DIS

relative frame counter 2 disable

0 (B_0x0): no effect

1 (B_0x1): relative frame counter 2 disabled

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32