I3C_SR

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Interpret as I3C_SR

ABT=B_0x0, DIR=B_0x0

I3C status register

XDCNT	Data counter
ABT	A private read message is ended prematurely by the target (when the I3C acts as controller) 0 (B_0x0): no early completion from the target 1 (B_0x1): early completion from the target
DIR	Message direction 0 (B_0x0): write 1 (B_0x1): read
MID	Message identifier/counter of a given frame (when the I3C acts as controller)

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