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stm32 /stm32n6 /STM32N655 /LTDC /LTDC_L1AFBA0R

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Interpret as LTDC_L1AFBA0R

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AFBADD0

Description

LTDC layer1 auxiliary frame buffer address 0 register

Fields

AFBADD0

frame buffer start address

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32