stm32 /stm32n6 /STM32N655 /LTDC /LTDC_L1CR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as LTDC_L1CR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LEN 0 (B_0x0)CKEN 0 (B_0x0)CLUTEN 0 (B_0x0)HMEN 0 (B_0x0)DCBEN

LEN=B_0x0, CLUTEN=B_0x0, CKEN=B_0x0, DCBEN=B_0x0, HMEN=B_0x0

Description

LTDC layerx control register

Fields

LEN

layer enable

0 (B_0x0): layer disabled

1 (B_0x1): layer enabled

CKEN

color keying enable

0 (B_0x0): color keying disabled

1 (B_0x1): color keying enabled: if RGB matches, then the ARGB are set to 0.

CLUTEN

color look-up table enable

0 (B_0x0): color look-up table disabled

1 (B_0x1): color look-up table enabled

HMEN

horizontal mirroring enable

0 (B_0x0): mirror disabled

1 (B_0x1): mirror enabled (if so, the color frame buffer start address has to be set to the last byte of the first line, so for instance: if line is 100 pixels, 24 bpp, then address is set to 299)

DCBEN

default color blending enable

0 (B_0x0): blending disabled

1 (B_0x1): blending enabled

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