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stm32 /stm32n6 /STM32N655 /PWR /PWR_SVMCR3

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Interpret as PWR_SVMCR3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)VDDIO2VMEN 0 (B_0x0)VDDIO3VMEN 0 (B_0x0)USB33VMEN 0 (B_0x0)AVMEN 0 (B_0x0)VDDIO2SV 0 (B_0x0)VDDIO3SV 0 (B_0x0)USB33SV 0 (B_0x0)ASV 0 (B_0x0)VDDIO2RDY 0 (B_0x0)VDDIO3RDY 0 (B_0x0)USB33RDY 0 (B_0x0)ARDY 0 (B_0x0)VDDIOVRSEL 0 (B_0x0)VDDIO2VRSEL 0 (B_0x0)VDDIO3VRSEL

VDDIO3VRSEL=B_0x0, VDDIO2VMEN=B_0x0, VDDIO3SV=B_0x0, AVMEN=B_0x0, USB33VMEN=B_0x0, ARDY=B_0x0, VDDIO2RDY=B_0x0, VDDIO2SV=B_0x0, VDDIOVRSEL=B_0x0, USB33RDY=B_0x0, USB33SV=B_0x0, VDDIO2VRSEL=B_0x0, VDDIO3VMEN=B_0x0, ASV=B_0x0, VDDIO3RDY=B_0x0

Description

PWR supply voltage monitoring control register 3

Fields

VDDIO2VMEN

Vless thansub>DDIO2 less than/sub>independent voltage monitor enable

0 (B_0x0): Vless thansub>DDIO2less than/sub> voltage monitor disabled

1 (B_0x1): Vless thansub>DDIO2less than/sub> voltage monitor enabled
VDDIO3VMEN

Vless thansub>DDIO3 less than/sub>independent voltage monitor enable

0 (B_0x0): Vless thansub>DDIO3less than/sub> voltage monitor disabled

1 (B_0x1): Vless thansub>DDIO3less than/sub> voltage monitor enabled
USB33VMEN

Vless thansub>DD33USB less than/sub>independent USB 33 voltage monitor enable.

0 (B_0x0): Vless thansub>DD33USBless than/sub> voltage monitor disabled

1 (B_0x1): Vless thansub>DD33USBless than/sub> voltage monitor enabled
AVMEN

Vless thansub>DDA18ADC less than/sub>independent ADC voltage monitor enable

0 (B_0x0): Vless thansub>DDA18ADCless than/sub> voltage monitor disabled

1 (B_0x1): Vless thansub>DDA18ADCless than/sub> voltage monitor enabled
VDDIO2SV

Vless thansub>DDIO2 less than/sub>independent supply valid.

0 (B_0x0): Vless thansub>DDIO2less than/sub> is not present. Logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): Vless thansub>DDIO2less than/sub> is valid.
VDDIO3SV

Vless thansub>DDIO3 less than/sub>independent supply valid

0 (B_0x0): Vless thansub>DDIO3less than/sub> is not present. Logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): Vless thansub>DDIO3less than/sub> is valid.
USB33SV

Vless thansub>DD33USB less than/sub>independent supply valid

0 (B_0x0): Vless thansub>DD33USBless than/sub> is not present. Logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): Vless thansub>DD33USBless than/sub> is valid.
ASV

Vless thansub>DDA18ADC less than/sub>independent supply valid

0 (B_0x0): Vless thansub>DDA18ADCless than/sub> is not present. Logical and electrical isolation is applied to ignore this supply.

1 (B_0x1): Vless thansub>DDA18ADCless than/sub> is valid.
VDDIO2RDY

Vless thansub>DDIO2 less than/sub>ready

0 (B_0x0): Vless thansub>DDIO2less than/sub> is below the threshold of the VDDIO2 voltage monitor.

1 (B_0x1): Vless thansub>DDIO2less than/sub> is equal or above the threshold of the VDDIO2 voltage monitor.
VDDIO3RDY

Vless thansub>DDIO3 less than/sub>ready

0 (B_0x0): Vless thansub>DDIO3less than/sub> is below the threshold of the VDDIO3 voltage monitor.

1 (B_0x1): Vless thansub>DDIO3less than/sub> is equal or above the threshold of the VDDIO3 voltage monitor.
USB33RDY

Vless thansub>DD33USB less than/sub>ready

0 (B_0x0): Vless thansub>DD33USBless than/sub> is below the threshold of the USB33 voltage monitor.

1 (B_0x1): Vless thansub>DD33USBless than/sub> is equal or above the threshold of the USB33 voltage monitor.
ARDY

Vless thansub>DDA18ADC less than/sub>ready

0 (B_0x0): Vless thansub>DDA18ADCless than/sub> is below the threshold of the VDDA18ADC voltage monitor.

1 (B_0x1): Vless thansub>DDA18ADCless than/sub> is equal or above the threshold of the VDDA18ADC voltage monitor.
VDDIOVRSEL

Vless thansub>DDless than/sub> I/O voltage range selection

0 (B_0x0): 3v3 voltage range selected. If Vless thansub>DDless than/sub> is in 1v8 range with this setting, I/Os work in degraded mode.

1 (B_0x1): 1v8 voltage range selected. HSLV_VDD option bit must be set to allow 1v8 voltage range operation. Setting this configuration while Vless thansub>DDless than/sub> is in 3v3 range damages the device.
VDDIO2VRSEL

Vless thansub>DDIO2less than/sub> I/O voltage range selection

0 (B_0x0): 3v3 voltage range selected. If Vless thansub>DDIO2less than/sub> is in 1v8 range with this setting, I/Os work in degraded mode.

1 (B_0x1): 1v8 voltage range selected. HSLV_VDDIO2 option bit must be set to allow 1v8 voltage range operation. Setting this configuration while Vless thansub>DDIO2less than/sub> is in 3v3 range damages the device.
VDDIO3VRSEL

Vless thansub>DDIO3less than/sub> I/O voltage range selection

0 (B_0x0): 3v3 voltage range selected. If Vless thansub>DDIO3less than/sub> is in 1v8 range with this setting, I/Os work in degraded mode.

1 (B_0x1): 1v8 voltage range selected. HSLV_VDDIO3 option bit must be set to allow 1v8 voltage range operation. Setting this configuration while Vless thansub>DDIO3less than/sub> is in 3v3 range damages the device.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32