stm32 /stm32n6 /STM32N655 /RCC /RCC_AHB4ENR

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Interpret as RCC_AHB4ENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)GPIOAEN 0 (B_0x0)GPIOBEN 0 (B_0x0)GPIOCEN 0 (B_0x0)GPIODEN 0 (B_0x0)GPIOEEN 0 (B_0x0)GPIOFEN 0 (B_0x0)GPIOGEN 0 (B_0x0)GPIOHEN 0 (B_0x0)GPIONEN 0 (B_0x0)GPIOOEN 0 (B_0x0)GPIOPEN 0 (B_0x0)GPIOQEN 0 (B_0x0)PWREN 0 (B_0x0)CRCEN

GPIOQEN=B_0x0, GPIOEEN=B_0x0, GPIODEN=B_0x0, GPIOBEN=B_0x0, GPIOCEN=B_0x0, GPIOPEN=B_0x0, GPIOAEN=B_0x0, GPIOFEN=B_0x0, GPIONEN=B_0x0, GPIOGEN=B_0x0, GPIOHEN=B_0x0, PWREN=B_0x0, GPIOOEN=B_0x0, CRCEN=B_0x0

Description

RCC AHB4 enable register

Fields

GPIOAEN

GPIOA enable

0 (B_0x0): GPIOA is disabled (default after reset)

1 (B_0x1): GPIOA is enabled

GPIOBEN

GPIOB enable

0 (B_0x0): GPIOB is disabled (default after reset)

1 (B_0x1): GPIOB is enabled

GPIOCEN

GPIOC enable

0 (B_0x0): GPIOC is disabled (default after reset)

1 (B_0x1): GPIOC is enabled

GPIODEN

GPIOD enable

0 (B_0x0): GPIOD is disabled (default after reset)

1 (B_0x1): GPIOD is enabled

GPIOEEN

GPIOE enable

0 (B_0x0): GPIOE is disabled (default after reset)

1 (B_0x1): GPIOE is enabled

GPIOFEN

GPIOF enable

0 (B_0x0): GPIOF is disabled (default after reset)

1 (B_0x1): GPIOF is enabled

GPIOGEN

GPIOG enable

0 (B_0x0): GPIOG is disabled (default after reset)

1 (B_0x1): GPIOG is enabled

GPIOHEN

GPIOH enable

0 (B_0x0): GPIOH is disabled (default after reset)

1 (B_0x1): GPIOH is enabled

GPIONEN

GPION enable

0 (B_0x0): GPION is disabled (default after reset)

1 (B_0x1): GPION is enabled

GPIOOEN

GPIOO enable

0 (B_0x0): GPIOO is disabled (default after reset)

1 (B_0x1): GPIOO is enabled

GPIOPEN

GPIOP enable

0 (B_0x0): GPIOP is disabled (default after reset)

1 (B_0x1): GPIOP is enabled

GPIOQEN

GPIOQ enable

0 (B_0x0): GPIOQ is disabled (default after reset)

1 (B_0x1): GPIOQ is enabled

PWREN

PWR enable

0 (B_0x0): PWR is disabled

1 (B_0x1): PWR is enabled (default after reset)

CRCEN

CRC enable

0 (B_0x0): CRC is disabled (default after reset)

1 (B_0x1): CRC is enabled

Links

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