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stm32 /stm32n6 /STM32N655 /RCC /RCC_APB2RSTCR

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Interpret as RCC_APB2RSTCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM1RSTC)TIM1RSTC 0 (TIM8RSTC)TIM8RSTC 0 (USART1RSTC)USART1RSTC 0 (USART6RSTC)USART6RSTC 0 (UART9RSTC)UART9RSTC 0 (USART10RSTC)USART10RSTC 0 (SPI1RSTC)SPI1RSTC 0 (SPI4RSTC)SPI4RSTC 0 (TIM18RSTC)TIM18RSTC 0 (TIM15RSTC)TIM15RSTC 0 (TIM16RSTC)TIM16RSTC 0 (TIM17RSTC)TIM17RSTC 0 (TIM9RSTC)TIM9RSTC 0 (SPI5RSTC)SPI5RSTC 0 (SAI1RSTC)SAI1RSTC 0 (SAI2RSTC)SAI2RSTC

Description

RCC APB2 reset register

Fields

TIM1RSTC

TIM1 reset
TIM8RSTC

TIM8 reset
USART1RSTC

USART1 reset
USART6RSTC

USART6 reset
UART9RSTC

UART9 reset
USART10RSTC

USART10 reset
SPI1RSTC

SPI1 reset
SPI4RSTC

SPI4 reset
TIM18RSTC

TIM18 reset
TIM15RSTC

TIM15 reset
TIM16RSTC

TIM16 reset
TIM17RSTC

TIM17 reset
TIM9RSTC

TIM9 reset
SPI5RSTC

SPI5 reset
SAI1RSTC

SAI1 reset
SAI2RSTC

SAI2 reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32