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stm32 /stm32n6 /STM32N655 /RCC /RCC_APB2RSTSR

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Interpret as RCC_APB2RSTSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TIM1RSTS)TIM1RSTS 0 (TIM8RSTS)TIM8RSTS 0 (USART1RSTS)USART1RSTS 0 (USART6RSTS)USART6RSTS 0 (UART9RSTS)UART9RSTS 0 (USART10RSTS)USART10RSTS 0 (SPI1RSTS)SPI1RSTS 0 (SPI4RSTS)SPI4RSTS 0 (TIM18RSTS)TIM18RSTS 0 (TIM15RSTS)TIM15RSTS 0 (TIM16RSTS)TIM16RSTS 0 (TIM17RSTS)TIM17RSTS 0 (TIM9RSTS)TIM9RSTS 0 (SPI5RSTS)SPI5RSTS 0 (SAI1RSTS)SAI1RSTS 0 (SAI2RSTS)SAI2RSTS

Description

RCC APB2 reset register

Fields

TIM1RSTS

TIM1 reset
TIM8RSTS

TIM8 reset
USART1RSTS

USART1 reset
USART6RSTS

USART6 reset
UART9RSTS

UART9 reset
USART10RSTS

USART10 reset
SPI1RSTS

SPI1 reset
SPI4RSTS

SPI4 reset
TIM18RSTS

TIM18 reset
TIM15RSTS

TIM15 reset
TIM16RSTS

TIM16 reset
TIM17RSTS

TIM17 reset
TIM9RSTS

TIM9 reset
SPI5RSTS

SPI5 reset
SAI1RSTS

SAI1 reset
SAI2RSTS

SAI2 reset

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32