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stm32 /stm32n6 /STM32N655 /RCC /RCC_APB4LRSTSR

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Interpret as RCC_APB4LRSTSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (HDPRSTS)HDPRSTS 0 (LPUART1RSTS)LPUART1RSTS 0 (SPI6RSTS)SPI6RSTS 0 (I2C4RSTS)I2C4RSTS 0 (LPTIM2RSTS)LPTIM2RSTS 0 (LPTIM3RSTS)LPTIM3RSTS 0 (LPTIM4RSTS)LPTIM4RSTS 0 (LPTIM5RSTS)LPTIM5RSTS 0 (VREFBUFRSTS)VREFBUFRSTS 0 (RTCRSTS)RTCRSTS 0 (R2GRETRSTS)R2GRETRSTS 0 (R2GNPURSTS)R2GNPURSTS 0 (SERFRSTS)SERFRSTS

Description

RCC APB4L reset register

Fields

HDPRSTS

HDP reset
LPUART1RSTS

LPUART1 reset
SPI6RSTS

SPI6 reset
I2C4RSTS

I2C4 reset
LPTIM2RSTS

LPTIM2 reset
LPTIM3RSTS

LPTIM3 reset
LPTIM4RSTS

LPTIM4 reset
LPTIM5RSTS

LPTIM5 reset
VREFBUFRSTS

VREFBUF reset
RTCRSTS

RTC reset
R2GRETRSTS

R2GRET reset
R2GNPURSTS

R2GNPU reset
SERFRSTS

SERF reset

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32