Regviz

stm32 /stm32n6 /STM32N655 /RCC /RCC_CSR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as RCC_CSR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32n6/STM32N645/RCC/RCC_CSR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSIONS)LSIONS 0 (LSEONS)LSEONS 0 (MSIONS)MSIONS 0 (HSIONS)HSIONS 0 (HSEONS)HSEONS 0 (PLL1ONS)PLL1ONS 0 (PLL2ONS)PLL2ONS 0 (PLL3ONS)PLL3ONS 0 (PLL4ONS)PLL4ONS

Description

RCC control set register

Fields

LSIONS

LSI oscillator enable in Run/Sleep mode.
LSEONS

LSE oscillator enable in Run/Sleep mode.
MSIONS

MSI oscillator enable in Run/Sleep mode.
HSIONS

HSI oscillator enable in Run/Sleep mode.
HSEONS

HSE oscillator enable in Run/Sleep mode.
PLL1ONS

PLL1 oscillator enable in Run/Sleep mode.
PLL2ONS

PLL2 oscillator enable in Run/Sleep mode.
PLL3ONS

PLL3 oscillator enable in Run/Sleep mode.
PLL4ONS

PLL4 oscillator enable in Run/Sleep mode.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32