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stm32 /stm32n6 /STM32N655 /RCC /RCC_IC11CFGR

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Interpret as RCC_IC11CFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)IC11INT0 (B_0x0)IC11SEL

IC11INT=B_0x0, IC11SEL=B_0x0

Description

RCC IC11 configuration register

Fields

IC11INT

Divider IC11 integer division factor

0 (B_0x0): IC11 = pllx_ck

1 (B_0x1): IC11 = pllx_ck / 2

2 (B_0x2): IC11 = pllx_ck / 3

3 (B_0x3): IC11 = pllx_ck / 4 (default after reset)

255 (B_0xFF): IC11 = pllx_ck / 256
IC11SEL

Divider IC11 Source Selection

0 (B_0x0): pll1_ck is selected (default after reset)

1 (B_0x1): pll2_ck is selected

2 (B_0x2): hsi_ck = hsi_osc_ck / 4

3 (B_0x3): hsi_ck = hsi_osc_ck / 8

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32