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stm32 /stm32n6 /STM32N655 /RCC /RCC_MEMENCR

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Interpret as RCC_MEMENCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AXISRAM3ENC)AXISRAM3ENC 0 (AXISRAM4ENC)AXISRAM4ENC 0 (AXISRAM5ENC)AXISRAM5ENC 0 (AXISRAM6ENC)AXISRAM6ENC 0 (AHBSRAM1ENC)AHBSRAM1ENC 0 (AHBSRAM2ENC)AHBSRAM2ENC 0 (BKPSRAMENC)BKPSRAMENC 0 (AXISRAM1ENC)AXISRAM1ENC 0 (AXISRAM2ENC)AXISRAM2ENC 0 (FLEXRAMENC)FLEXRAMENC 0 (NPUCACHERAMENC)NPUCACHERAMENC 0 (VENCRAMENC)VENCRAMENC 0 (BOOTROMENC)BOOTROMENC

Description

RCC memory enable register

Fields

AXISRAM3ENC

AXISRAM3 enable
AXISRAM4ENC

AXISRAM4 enable
AXISRAM5ENC

AXISRAM5 enable
AXISRAM6ENC

AXISRAM6 enable
AHBSRAM1ENC

AHBSRAM1 enable
AHBSRAM2ENC

AHBSRAM2 enable
BKPSRAMENC

BKPSRAM enable
AXISRAM1ENC

AXISRAM1 enable
AXISRAM2ENC

AXISRAM2 enable
FLEXRAMENC

FLEXRAM enable
NPUCACHERAMENC

NPUCACHERAM enable
VENCRAMENC

VENCRAM enable
BOOTROMENC

BOOTROM enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32