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stm32 /stm32n6 /STM32N655 /RCC /RCC_MEMLPENR

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Interpret as RCC_MEMLPENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)AXISRAM3LPEN 0 (B_0x0)AXISRAM4LPEN 0 (B_0x0)AXISRAM5LPEN 0 (B_0x0)AXISRAM6LPEN 0 (B_0x0)AHBSRAM1LPEN 0 (B_0x0)AHBSRAM2LPEN 0 (B_0x0)BKPSRAMLPEN 0 (B_0x0)AXISRAM1LPEN 0 (B_0x0)AXISRAM2LPEN 0 (B_0x0)FLEXRAMLPEN 0 (B_0x0)NPUCACHERAMLPEN 0 (B_0x0)VENCRAMLPEN 0 (B_0x0)BOOTROMLPEN

NPUCACHERAMLPEN=B_0x0, VENCRAMLPEN=B_0x0, FLEXRAMLPEN=B_0x0, BKPSRAMLPEN=B_0x0, AHBSRAM2LPEN=B_0x0, BOOTROMLPEN=B_0x0, AXISRAM6LPEN=B_0x0, AXISRAM2LPEN=B_0x0, AXISRAM5LPEN=B_0x0, AHBSRAM1LPEN=B_0x0, AXISRAM4LPEN=B_0x0, AXISRAM3LPEN=B_0x0, AXISRAM1LPEN=B_0x0

Description

RCC memory Sleep enable register

Fields

AXISRAM3LPEN

AXISRAM3 sleep enable

0 (B_0x0): AXISRAM3 is disabled in Sleep mode (default after reset)

1 (B_0x1): AXISRAM3 is enabled in Sleep mode
AXISRAM4LPEN

AXISRAM4 sleep enable

0 (B_0x0): AXISRAM4 is disabled in Sleep mode (default after reset)

1 (B_0x1): AXISRAM4 is enabled in Sleep mode
AXISRAM5LPEN

AXISRAM5 sleep enable

0 (B_0x0): AXISRAM5 is disabled in Sleep mode (default after reset)

1 (B_0x1): AXISRAM5 is enabled in Sleep mode
AXISRAM6LPEN

AXISRAM6 sleep enable

0 (B_0x0): AXISRAM6 is disabled in Sleep mode (default after reset)

1 (B_0x1): AXISRAM6 is enabled in Sleep mode
AHBSRAM1LPEN

AHBSRAM1 sleep enable

0 (B_0x0): AHBSRAM1 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHBSRAM1 is enabled in Sleep mode
AHBSRAM2LPEN

AHBSRAM2 sleep enable

0 (B_0x0): AHBSRAM2 is disabled in Sleep mode (default after reset)

1 (B_0x1): AHBSRAM2 is enabled in Sleep mode
BKPSRAMLPEN

BKPSRAM sleep enable

0 (B_0x0): BKPSRAM is disabled in Sleep mode (default after reset)

1 (B_0x1): BKPSRAM is enabled in Sleep mode
AXISRAM1LPEN

AXISRAM1 sleep enable

0 (B_0x0): AXISRAM1 is disabled in Sleep mode (default after reset)

1 (B_0x1): AXISRAM1 is enabled in Sleep mode
AXISRAM2LPEN

AXISRAM2 sleep enable

0 (B_0x0): AXISRAM2 is disabled in Sleep mode (default after reset)

1 (B_0x1): AXISRAM2 is enabled in Sleep mode
FLEXRAMLPEN

FLEXRAM sleep enable

0 (B_0x0): FLEXRAM is disabled in Sleep mode (default after reset)

1 (B_0x1): FLEXRAM is enabled in Sleep mode
NPUCACHERAMLPEN

NPUCACHERAM sleep enable

0 (B_0x0): NPUCACHERAM is disabled in Sleep mode (default after reset)

1 (B_0x1): NPUCACHERAM is enabled in Sleep mode
VENCRAMLPEN

VENCRAM sleep enable

0 (B_0x0): VENCRAM is disabled in Sleep mode (default after reset)

1 (B_0x1): VENCRAM is enabled in Sleep mode
BOOTROMLPEN

BOOTROM sleep enable

0 (B_0x0): BOOTROM is disabled in Sleep mode (default after reset)

1 (B_0x1): BOOTROM is enabled in Sleep mode

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32