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stm32 /stm32n6 /STM32N655 /RCC /RCC_MEMLPENSR

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Interpret as RCC_MEMLPENSR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (AXISRAM3LPENS)AXISRAM3LPENS 0 (AXISRAM4LPENS)AXISRAM4LPENS 0 (AXISRAM5LPENS)AXISRAM5LPENS 0 (AXISRAM6LPENS)AXISRAM6LPENS 0 (AHBSRAM1LPENS)AHBSRAM1LPENS 0 (AHBSRAM2LPENS)AHBSRAM2LPENS 0 (BKPSRAMLPENS)BKPSRAMLPENS 0 (AXISRAM1LPENS)AXISRAM1LPENS 0 (AXISRAM2LPENS)AXISRAM2LPENS 0 (FLEXRAMLPENS)FLEXRAMLPENS 0 (NPUCACHERAMLPENS)NPUCACHERAMLPENS 0 (VENCRAMLPENS)VENCRAMLPENS 0 (BOOTROMLPENS)BOOTROMLPENS

Description

RCC memory sleep enable register

Fields

AXISRAM3LPENS

AXISRAM3 sleep enable
AXISRAM4LPENS

AXISRAM4 sleep enable
AXISRAM5LPENS

AXISRAM5 sleep enable
AXISRAM6LPENS

AXISRAM6 sleep enable
AHBSRAM1LPENS

AHBSRAM1 sleep enable
AHBSRAM2LPENS

AHBSRAM2 sleep enable
BKPSRAMLPENS

BKPSRAM sleep enable
AXISRAM1LPENS

AXISRAM1 sleep enable
AXISRAM2LPENS

AXISRAM2 sleep enable
FLEXRAMLPENS

FLEXRAM sleep enable
NPUCACHERAMLPENS

NPUCACHERAM sleep enable
VENCRAMLPENS

VENCRAM sleep enable
BOOTROMLPENS

BOOTROM sleep enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32