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stm32 /stm32n6 /STM32N655 /RCC /RCC_MISCRSTR

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Interpret as RCC_MISCRSTR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)DBGRST 0 (B_0x0)XSPIPHY1RST 0 (B_0x0)XSPIPHY2RST 0 (B_0x0)SDMMC1DLLRST 0 (B_0x0)SDMMC2DLLRST

XSPIPHY2RST=B_0x0, SDMMC2DLLRST=B_0x0, XSPIPHY1RST=B_0x0, DBGRST=B_0x0, SDMMC1DLLRST=B_0x0

Description

RCC miscellaneous configurations reset register

Fields

DBGRST

DBG reset

0 (B_0x0): DBG is not under reset (default after reset)

1 (B_0x1): DBG is under reset
XSPIPHY1RST

XSPIPHY1 reset

0 (B_0x0): XSPIPHY1 is not under reset (default after reset)

1 (B_0x1): XSPIPHY1 is under reset
XSPIPHY2RST

XSPIPHY2 reset

0 (B_0x0): XSPIPHY2 is not under reset (default after reset)

1 (B_0x1): XSPIPHY2 is under reset
SDMMC1DLLRST

SDMMC1DLL reset

0 (B_0x0): SDMMC1DLL is not under reset (default after reset)

1 (B_0x1): SDMMC1DLL is under reset
SDMMC2DLLRST

SDMMC2DLL reset

0 (B_0x0): SDMMC2DLL is not under reset (default after reset)

1 (B_0x1): SDMMC2DLL is under reset

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32