stm32 /stm32n6 /STM32N655 /RCC /RCC_PRIVCFGSR0

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Interpret as RCC_PRIVCFGSR0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSIPVS)LSIPVS 0 (LSEPVS)LSEPVS 0 (MSIPVS)MSIPVS 0 (HSIPVS)HSIPVS 0 (HSEPVS)HSEPVS

Description

RCC oscillator privilege configuration register0

Fields

LSIPVS

Defines the privilege protection of the LSI configuration bits (enable, ready, divider).

LSEPVS

Defines the privilege protection of the LSE configuration bits (enable, ready, divider).

MSIPVS

Defines the privilege protection of the MSI configuration bits (enable, ready, divider).

HSIPVS

Defines the privilege protection of the HSI configuration bits (enable, ready, divider).

HSEPVS

Defines the privilege protection of the HSE configuration bits (enable, ready, divider).

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