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stm32 /stm32n6 /STM32N655 /RCC /RCC_SECCFGR0

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Interpret as RCC_SECCFGR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)LSISEC 0 (B_0x0)LSESEC 0 (B_0x0)MSISEC 0 (B_0x0)HSISEC 0 (B_0x0)HSESEC

HSESEC=B_0x0, HSISEC=B_0x0, LSESEC=B_0x0, MSISEC=B_0x0, LSISEC=B_0x0

Description

RCC oscillator secure configuration register0

Fields

LSISEC

Defines the secure protection of the LSI oscillator configuration bits.

0 (B_0x0): LSI configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): LSI configuration bits are accessible by secure software only
LSESEC

Defines the secure protection of the LSE oscillator configuration bits.

0 (B_0x0): LSE configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): LSE configuration bits are accessible by secure software only
MSISEC

Defines the secure protection of the MSI oscillator configuration bits.

0 (B_0x0): MSI configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): MSI configuration bits are accessible by secure software only
HSISEC

Defines the secure protection of the HSI oscillator configuration bits.

0 (B_0x0): HSI configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): HSI configuration bits are accessible by secure software only
HSESEC

Defines the secure protection of the HSE oscillator configuration bits.

0 (B_0x0): HSE configuration bits are accessible by non-secure software only (default after reset)

1 (B_0x1): HSE configuration bits are accessible by secure software only

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32