stm32 /stm32n6 /STM32N655 /RISAF /RISAF_REG1_ANESTR

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Interpret as RISAF_REG1_ANESTR

31282724232019161512118743000000000000000000000000000000000000000000 (B_0x0)DCEN

DCEN=B_0x0

Description

RISAF region 1 subregion A nested mode register

Fields

DCEN

delegated configuration enable

0 (B_0x0): RIF configuration for subregion z can be written only by the secure privileged software.

1 (B_0x1): RIF configuration for subregion z can be written only

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