IC1F=B_0x0, CC2S=B_0x0, IC1PSC=B_0x0, CC1S=B_0x0
TIM2 capture/compare mode register 1
| CC1S | Capture/Compare 1 selection 0 (B_0x0): CC1 channel is configured as output 1 (B_0x1): CC1 channel is configured as input, tim_ic1 is mapped on tim_ti1 2 (B_0x2): CC1 channel is configured as input, tim_ic1 is mapped on tim_ti2 3 (B_0x3): CC1 channel is configured as input, tim_ic1 is mapped on tim_trc. This mode is working only if an internal trigger input is selected through TS bit (TIMx_SMCR register) |
| IC1PSC | Input capture 1 prescaler 0 (B_0x0): no prescaler, capture is done each time an edge is detected on the capture input 1 (B_0x1): capture is done once every 2 events 2 (B_0x2): capture is done once every 4 events 3 (B_0x3): capture is done once every 8 events |
| IC1F | Input capture 1 filter 0 (B_0x0): No filter, sampling is done at fless thansub>DTSless than/sub> 1 (B_0x1): fless thansub>SAMPLINGless than/sub>=fless thansub>tim_ker_ckless than/sub>, N=2 2 (B_0x2): fless thansub>SAMPLINGless than/sub>=fless thansub>tim_ker_ckless than/sub>, N=4 3 (B_0x3): fless thansub>SAMPLINGless than/sub>=fless thansub>tim_ker_ckless than/sub>, N=8 4 (B_0x4): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/2, N=6 5 (B_0x5): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/2, N=8 6 (B_0x6): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/4, N=6 7 (B_0x7): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/4, N=8 8 (B_0x8): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/8, N=6 9 (B_0x9): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/8, N=8 10 (B_0xA): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/16, N=5 11 (B_0xB): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/16, N=6 12 (B_0xC): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/16, N=8 13 (B_0xD): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/32, N=5 14 (B_0xE): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/32, N=6 15 (B_0xF): fless thansub>SAMPLINGless than/sub>=fless thansub>DTSless than/sub>/32, N=8 |
| CC2S | Capture/compare 2 selection 0 (B_0x0): CC2 channel is configured as output. 1 (B_0x1): CC2 channel is configured as input, tim_ic2 is mapped on tim_ti2. 2 (B_0x2): CC2 channel is configured as input, tim_ic2 is mapped on tim_ti1. 3 (B_0x3): CC2 channel is configured as input, tim_ic2 is mapped on tim_trc. This mode is working only if an internal trigger input is selected through TS bit (TIMx_SMCR register) |
| IC2PSC | Input capture 2 prescaler |
| IC2F | Input capture 2 filter |