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stm32 /stm32n6 /STM32N655 /VENC /VENC_SWREG58

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Interpret as VENC_SWREG58

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SWREG_FIELD

Description

VENC intra slice bitmap for slices 0…31/base address for 1st DCT partition register

Fields

SWREG_FIELD

intra slice bitmap for slices 0…31 / Base address for 1st DCT partition (all format mode)

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32