ROVSE=B_0x0, OVSS=B_0x0, JOVSE=B_0x0, OSR=B_0x0, LSHIFT=B_0x0, SMPTRIG=B_0x0, BULB=B_0x0, SWTRIG=B_0x0, ROVSM=B_0x0, TROVS=B_0x0
ADC configuration register 2
ROVSE | Regular oversampling enable 0 (B_0x0): Regular Oversampling disabled 1 (B_0x1): Regular Oversampling enabled |
JOVSE | Injected oversampling enable 0 (B_0x0): Injected oversampling disabled 1 (B_0x1): Injected oversampling enabled |
OVSS | Oversampling shift 0 (B_0x0): No shift 1 (B_0x1): 1-bit shift 2 (B_0x2): 2-bit shift 3 (B_0x3): 3-bit shift 4 (B_0x4): 4-bit shift 5 (B_0x5): 5-bit shift 6 (B_0x6): 6-bit shift 7 (B_0x7): 7-bit shift 8 (B_0x8): 8-bit shift 9 (B_0x9): 9-bit shift 10 (B_0xA): 10-bit shift |
TROVS | Triggered regular oversampling 0 (B_0x0): All oversampled conversions for a channel are done consecutively following a trigger 1 (B_0x1): Each oversampled conversion for a channel needs a new trigger |
ROVSM | Regular oversampling mode 0 (B_0x0): Continued mode: When injected conversions are triggered, the oversampling is temporary stopped and continued after the injection sequence (oversampling buffer is maintained during injected sequence) 1 (B_0x1): Resumed mode: When injected conversions are triggered, the current oversampling is aborted and resumed from start after the injection sequence (oversampling buffer is zeroed by injected sequence start) |
BULB | Bulb sampling mode 0 (B_0x0): Bulb sampling mode disabled 1 (B_0x1): Bulb sampling mode enabled. The sampling period starts just after the previous end of conversion. |
SWTRIG | Software trigger bit for sampling time control trigger mode 0 (B_0x0): Software trigger starts the conversion for sampling time control trigger mode 1 (B_0x1): Software trigger starts the sampling for sampling time control trigger mode |
SMPTRIG | Sampling time control trigger mode 0 (B_0x0): Sampling time control trigger mode disabled 1 (B_0x1): Sampling time control trigger mode enabled |
OSR | Oversampling ratio 0 (B_0x0): 1x (no oversampling) 1 (B_0x1): 2x |
LSHIFT | Left shift factor 0 (B_0x0): No left shift 1 (B_0x1): 1-bit left shift 2 (B_0x2): 2-bit left shift 3 (B_0x3): 3-bit left shift 4 (B_0x4): 4-bit left shift 5 (B_0x5): 5-bit left shift 6 (B_0x6): 6-bit left shift 7 (B_0x7): 7-bit left shift 8 (B_0x8): 8-bit left shift 9 (B_0x9): 9-bit left shift 10 (B_0xA): 10-bit left shift 11 (B_0xB): 11-bit left shift 12 (B_0xC): 12-bit left shift 13 (B_0xD): 13-bit left shift 14 (B_0xE): 14-bit left shift 15 (B_0xF): 15-bit left shift |