stm32 /stm32n6 /STM32N657 /CACHEAXI /CACHEAXI_CR1

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Interpret as CACHEAXI_CR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)EN 0 (B_0x0)CACHEINV 0 (B_0x0)RHITMEN 0 (B_0x0)RMISSMEN 0 (B_0x0)RHITMRST 0 (B_0x0)RMISSMRST 0 (B_0x0)WHITMEN 0 (B_0x0)WMISSMEN 0 (B_0x0)WHITMRST 0 (B_0x0)WMISSMRST 0 (B_0x0)RAMMEN 0 (B_0x0)WAMMEN 0 (B_0x0)RAMMRST 0 (B_0x0)WAMMRST 0 (B_0x0)WTMEN 0 (B_0x0)EVIMEN 0 (B_0x0)WTMRST 0 (B_0x0)EVIMRST

RHITMRST=B_0x0, WMISSMEN=B_0x0, EVIMEN=B_0x0, WHITMEN=B_0x0, RMISSMEN=B_0x0, WAMMRST=B_0x0, EN=B_0x0, WMISSMRST=B_0x0, WTMRST=B_0x0, RMISSMRST=B_0x0, WAMMEN=B_0x0, RAMMRST=B_0x0, RAMMEN=B_0x0, EVIMRST=B_0x0, WHITMRST=B_0x0, WTMEN=B_0x0, CACHEINV=B_0x0, RHITMEN=B_0x0

Description

CACHEAXI control register 1

Fields

EN

enable

0 (B_0x0): cache mode disabled (CACHEAXI bypassed, or in SRAM mode if option supported)

1 (B_0x1): cache mode enabled

CACHEINV

full cache invalidation

0 (B_0x0): no effect

1 (B_0x1): invalidate entire cache (all cache lines valid bit = 0)

RHITMEN

read-hit monitor enable

0 (B_0x0): cache read-hit monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache read-hit monitor enabled

RMISSMEN

read-miss monitor enable

0 (B_0x0): cache read-miss monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache read-miss monitor enabled

RHITMRST

read-hit monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache read-hit monitor

RMISSMRST

read-miss monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache read-miss monitor

WHITMEN

write-hit monitor enable

0 (B_0x0): cache write-hit monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache write-hit monitor enabled

WMISSMEN

write-miss monitor enable

0 (B_0x0): cache write-miss monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache write-miss monitor enabled

WHITMRST

write-hit monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache write-hit monitor

WMISSMRST

write-miss monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache write-miss monitor

RAMMEN

read-allocate miss monitor enable

0 (B_0x0): cache read-allocate miss monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache read-allocate miss monitor enabled

WAMMEN

write-allocate miss monitor enable

0 (B_0x0): cache write-allocate miss monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache write-allocate miss monitor enabled

RAMMRST

read-allocate miss monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache read-allocate miss monitor

WAMMRST

write-allocate miss monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache write-allocate miss monitor

WTMEN

write-through monitor enable

0 (B_0x0): cache write-through monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache write-through monitor enabled

EVIMEN

eviction monitor enable

0 (B_0x0): cache eviction monitor switched off. Stopping the monitor does not reset it.

1 (B_0x1): cache eviction monitor enabled

WTMRST

write-through monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache write-through monitor

EVIMRST

eviction monitor reset

0 (B_0x0): no effect

1 (B_0x1): reset cache eviction monitor

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