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stm32 /stm32n6 /STM32N657 /CACHEAXI /CACHEAXI_FCR

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Interpret as CACHEAXI_FCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)CBSYENDF 0 (B_0x0)CERRF 0 (B_0x0)CCMDENDF

CERRF=B_0x0, CCMDENDF=B_0x0, CBSYENDF=B_0x0

Description

CACHEAXI flag clear register

Fields

CBSYENDF

clear full invalidate busy end flag

0 (B_0x0): no effect

1 (B_0x1): clears BSYENDF flag in CACHEAXI_SR.
CERRF

clear cache error flag

0 (B_0x0): no effect

1 (B_0x1): clears ERRF flag in CACHEAXI_SR.
CCMDENDF

clear command end flag

0 (B_0x0): no effect

1 (B_0x1): clears CMDENDF flag in CACHEAXI_SR.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32