stm32 /stm32n6 /STM32N657 /DCMI /DCMI_IER

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Interpret as DCMI_IER

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)FRAME_IE 0 (B_0x0)OVR_IE 0 (B_0x0)ERR_IE 0 (B_0x0)VSYNC_IE 0 (B_0x0)LINE_IE

VSYNC_IE=B_0x0, ERR_IE=B_0x0, FRAME_IE=B_0x0, LINE_IE=B_0x0, OVR_IE=B_0x0

Description

DCMI interrupt enable register

Fields

FRAME_IE

Capture complete interrupt enable

0 (B_0x0): No interrupt generation

1 (B_0x1): An interrupt is generated at the end of each received frame/crop window (in crop mode).

OVR_IE

Overrun interrupt enable

0 (B_0x0): No interrupt generation

1 (B_0x1): An interrupt is generated if the DMA was not able to transfer the last data before new data (32-bit) are received.

ERR_IE

Synchronization error interrupt enable

0 (B_0x0): No interrupt generation

1 (B_0x1): An interrupt is generated if the embedded synchronization codes are not received in the correct order.

VSYNC_IE

DCMI_VSYNC interrupt enable

0 (B_0x0): No interrupt generation

1 (B_0x1): An interrupt is generated on each DCMI_VSYNC transition from the inactive to the active state.

LINE_IE

Line interrupt enable

0 (B_0x0): No interrupt generation when the line is received

1 (B_0x1): An Interrupt is generated when a line has been completely received.

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